[srslte-users] srsUE running issue

[仲修]

Hi SRS members,

We installed srsUE on Ettus USRP E312 (FPGA with ARM Cortex A9 866 MHz
dual-core processor). We run srsUE program, but there is an issue in
decoding MIB.

The logs show below:

 

linux; GNU C++ version 4.9.2; Boost_105700; UHD_003.009.002-0-unknown

 

---  Software Radio Systems LTE UE  ---

 

Reading configuration file ue.conf...

Using srsLTE version 001.002.000

Opening USRP with args: master_clock_rate=30.72e6

-- Loading FPGA image: /usr/share/uhd/images/usrp_e310_fpga_sg3.bit... done

-- Detecting internal GPSDO .... found

-- Initializing core control...

-- Performing register loopback test... pass

-- Performing register loopback test... pass

-- Performing register loopback test... pass

-- Performing CODEC loopback test... pass

-- Performing CODEC loopback test... pass

-- Setting time source to internal

-- Asking for clock rate 30.72 MHz

-- Actually got clock rate 30.72 MHz

-- Performing timer loopback test... pass

-- Performing timer loopback test... pass

 

UHD Warning:

    The requested decimation is odd; the user should expect passband CIC
rolloff.

    Select an even decimation to ensure that a halfband filter is enabled.

    Decimations factorable by 4 will enable 2 halfbands, those factorable by
8 will enable 3 halfbands.

    decimation = dsp_rate/samp_rate -> 31 = (30.720000 MHz)/(1.000000 MHz)

 

UHD Warning:

    The requested interpolation is odd; the user should expect CIC rolloff.

    Select an even interpolation to ensure that a halfband filter is
enabled.

    interpolation = dsp_rate/samp_rate -> 31 = (30.720000 MHz)/(1.000000
MHz)

Trying to dynamically change Master clock...

-- Asking for clock rate 15.36 MHz

-- Actually got clock rate 15.36 MHz

-- Performing timer loopback test... pass

-- Performing timer loopback test... pass

Master clock is configurable. Using reduced symbol sizes and sampling rates.

Setting frequency: DL=763.0 Mhz, UL=708.0 MHz

Searching for cell...

Using Volk machine: neon_hardfp

Found CELL ID: 212 CP: Normal  , CFO: 0.3 KHz.

Trying to decode MIB...

[ 1821.265775] Alignment trap: ue (5047) PC=0xb3683220 Instr=0xf4210aad
Address=0x9cd35fe8 FSR 0x001

[ 1821.274603] Alignment trap: ue (5047) PC=0xb368323c Instr=0xf4210aad
Address=0x9cd3553b FSR 0x011

[ 1821.283439] Alignment trap: ue (5047) PC=0xb3683244 Instr=0xf4004aad
Address=0x9cd35fe8 FSR 0x811

[ 1821.292294] Alignment trap: ue (5047) PC=0xb368323c Instr=0xf4210aad
Address=0x9cd34a8e FSR 0x001

[ 1821.301141] Alignment trap: ue (5047) PC=0xb3683244 Instr=0xf4004aad
Address=0x9cd3553b FSR 0x801

[ 1821.309994] Alignment trap: ue (5047) PC=0xb368323c Instr=0xf4210aad
Address=0x9cd33fe1 FSR 0x001

[ 1821.318857] Alignment trap: ue (5047) PC=0xb3683244 Instr=0xf4004aad
Address=0x9cd34a8e FSR 0x801

[ 1821.327686] Alignment trap: ue (5047) PC=0xb368323c Instr=0xf4210aad
Address=0x9cd33534 FSR 0x001

[ 1821.336554] Alignment trap: ue (5047) PC=0xb3683244 Instr=0xf4004aad
Address=0x9cd33fe1 FSR 0x811

[ 1821.345408] Alignment trap: ue (5047) PC=0xb368323c Instr=0xf4210aad
Address=0x9cd32a87 FSR 0x001

[ 1821.354272] Alignment trap: ue (5047) PC=0xb3683244 Instr=0xf4004aad
Address=0x9cd33534 FSR 0x801

[ 1821.363115] Alignment trap: ue (5047) PC=0xb368323c Instr=0xf4210aad
Address=0x9cd31fda FSR 0x001

[ 1821.371970] Alignment trap: ue (5047) PC=0xb3683244 Instr=0xf4004aad
Address=0x9cd32a87 FSR 0x801

…

 

It seems that the program has some memory corruptions, memory leaks, buffer
overflows, or bad pointers.

Is there any method to solve the problem or any help to cover it?

 

The operating system is Linux ettus-e3xx-sg3 3.14.2-xilinx #1 SMP PREEMPT
Thu Jan 7 14:49:20 PST 2016 armv7l GNU/Linux.

 

Best Regards,

Ahsiu.

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