[srslte-users] srsUE unable to connect to srsENB

Mon Aug 24 09:22:42 UTC 2020

Hey Raghav,

I've noticed that the CFO jumps quite a bit between the cell search
attempts. I guess the signal is quite weak. Please check the gain
settings on both ends and make sure the SNR at the UE is strong enough
to decode SIBs.

Please send UE logs in info mode.

Thanks
Andre

On 21/8/20 18:08, Raghav Rathi wrote:
> Hello everyone,
> 
> I am trying to run srsLTE but for some reason the UE is unable to connect to the eNB. It seems like UE is able to fine the cell but there is not exchange of PRACH between them. Can someone please help me with this?
> 
> —————————————————————————————————————————
> 
> sudo srsenb
> 
> Built in Release mode using commit d045213fb on branch HEAD.
> 
> ---  Software Radio Systems LTE eNodeB  ---
> 
> Reading configuration file /etc/srslte/enb.conf...
> Opening 1 RF devices with 1 RF channels...
> [INFO] [UHD] linux; GNU C++ version 7.3.0; Boost_106501; UHD_3.15.0.0-2ubuntu1emulab1
> [INFO] [LOGGING] Fastpath logging disabled at runtime.
> Opening USRP with args: type=x300,master_clock_rate=184.32e6
> [INFO] [X300] X300 initialization sequence...
> [INFO] [X300] Maximum frame size: 8000 bytes.
> [INFO] [X300] Radio 1x clock: 184.32 MHz
> [INFO] [GPS] No GPSDO found
> [INFO] [0/DmaFIFO_0] Initializing block control (NOC ID: 0xF1F0D00000000000)
> [INFO] [0/DmaFIFO_0] BIST passed (Throughput: 1304 MB/s)
> [INFO] [0/DmaFIFO_0] BIST passed (Throughput: 1316 MB/s)
> [INFO] [0/Radio_0] Initializing block control (NOC ID: 0x12AD100000000001)
> [INFO] [0/Radio_1] Initializing block control (NOC ID: 0x12AD100000000001)
> [INFO] [0/DDC_0] Initializing block control (NOC ID: 0xDDC0000000000000)
> [INFO] [0/DDC_1] Initializing block control (NOC ID: 0xDDC0000000000000)
> [INFO] [0/DUC_0] Initializing block control (NOC ID: 0xD0C0000000000000)
> [INFO] [0/DUC_1] Initializing block control (NOC ID: 0xD0C0000000000000)
> Setting frequency: DL=2625.0 Mhz, UL=2505.0 MHz
> Setting Sampling frequency 5.76 MHz
> 
> ==== eNodeB started ===
> Type <t> to view trace
> 
> —————————————————————————————————————————
> 
> sudo srsue
> Reading configuration file /etc/srslte/ue.conf...
> 
> Built in Release mode using commit d045213fb on branch HEAD.
> 
> Opening 1 RF devices with 1 RF channels...
> [INFO] [UHD] linux; GNU C++ version 7.3.0; Boost_106501; UHD_3.15.0.0-2ubuntu1emulab1
> [INFO] [LOGGING] Fastpath logging disabled at runtime.
> Opening USRP with args: type=b200,master_clock_rate=23.04e6
> [INFO] [B200] Detected Device: B210
> [INFO] [B200] Operating over USB 3.
> [INFO] [B200] Initialize CODEC control...
> [INFO] [B200] Initialize Radio control...
> [INFO] [B200] Performing register loopback test... 
> [INFO] [B200] Register loopback test passed
> [INFO] [B200] Performing register loopback test... 
> [INFO] [B200] Register loopback test passed
> [INFO] [B200] Asking for clock rate 23.040000 MHz... 
> [INFO] [B200] Actually got clock rate 23.040000 MHz.
> Waiting PHY to initialize ... done!
> Attaching UE...
> Searching cell in DL EARFCN=2800, f_dl=2625.0 MHz, f_ul=2505.0 MHz
> .
> Found Cell:  Mode=FDD, PCI=1, PRB=25, Ports=1, CFO=-3.5 KHz
> RF status: O=1, U=0, L=0
> ......
> .
> Found Cell:  Mode=FDD, PCI=1, PRB=25, Ports=1, CFO=-4.6 KHz
> .
> ..
> .
> .
> Found Cell:  Mode=FDD, PCI=1, PRB=25, Ports=1, CFO=-1.2 KHz
> .
> Found Cell:  Mode=FDD, PCI=1, PRB=25, Ports=1, CFO=-2.1 KHz
> ....
> Found Cell:  Mode=FDD, PCI=1, PRB=25, Ports=1, CFO=-2.9 KHz
> .
> Found Cell:  Mode=FDD, PCI=1, PRB=25, Ports=1, CFO=-3.4 KHz
> 
> —————————————————————————————————————————
> 
> I even tried to run "./lib/examples/pdsch_ue -f <freq>” as mentioned in the thread "http://www.softwareradiosystems.com/pipermail/srslte-users/2019-June/002680.html”
> 
> Here is the output for it
> 
> srslte/build$ ./lib/examples/pdsch_ue -f 2625000000
> Opening RF device with 1 RX antennas...
> [INFO] [UHD] linux; GNU C++ version 7.3.0; Boost_106501; UHD_3.15.0.0-2ubuntu1emulab1
> [INFO] [LOGGING] Fastpath logging disabled at runtime.
> [INFO] [B200] Loading firmware image: /usr/share/uhd/images/usrp_b200_fw.hex...
> Opening USRP with args: type=b200,master_clock_rate=23.04e6
> [INFO] [B200] Detected Device: B210
> [INFO] [B200] Loading FPGA image: /usr/share/uhd/images/usrp_b210_fpga.bin...
> [INFO] [B200] Operating over USB 3.
> [INFO] [B200] Detecting internal GPSDO.... 
> [INFO] [GPS] No GPSDO found
> [INFO] [B200] Initialize CODEC control...
> [INFO] [B200] Initialize Radio control...
> [INFO] [B200] Performing register loopback test... 
> [INFO] [B200] Register loopback test passed
> [INFO] [B200] Performing register loopback test... 
> [INFO] [B200] Register loopback test passed
> [INFO] [B200] Asking for clock rate 23.040000 MHz... 
> [INFO] [B200] Actually got clock rate 23.040000 MHz.
> Starting AGC thread...
> Tunning receiver to 2625.000 MHz
> Searching for cell...
>  Found Cell_id:   0 FDD, CP: Normal  , DetectRatio= 0% PSR=0.00, Power=-inf dBm
> *Found Cell_id:   1 FDD, CP: Normal  , DetectRatio=100% PSR=3.00, Power=-42.1 dBm
>  Found Cell_id:   0 FDD, CP: Normal  , DetectRatio= 0% PSR=0.00, Power=-inf dBm
> Decoding PBCH for cell 1 (N_id_2=1)
> Setting sampling rate 5.76 MHz
> Software Radio Systems, Ltd: cannot connect to X server
> 
> Let me know if you need me to attach any additional file. 
> Any help will be appreciated.
> 
> 
> Thank you,
> Raghav Rathi
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