[srsran-users] [srseNB] How to replace eNodeB PHY C++ code with an FPGA implementation

[Tichaona Kadzinga]

​Hello Hackers,

I am implementing the PHY of the eNodeB on the FPGA of my bladeRF-micro A9 github.com/t1ch/shanu. I would like to replace the srsRAN eNodeB PHY code with my implementation.

I want to know how to design the MAC PDUs that the FPGA will send and receive. The goal is during TX a transport block and metadata are sent to the FPGA and vice versa during RX.

For TX, where in the code does the transport block start the PHY process?

For RX, where in the code is the transport Block delivered to the MAC

Your help will be very much appreciated
Regards
Tich
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