[srsran-users] Large Timing Advance in srsuse

[08.chancy_fantasy at icloud.com]

Dear Community,

I am experimenting with a situation where the timing advance requirement can be as high as 0.5 millisecond (2-way delay).

My setup is 1T2R, 15MHz BW using USRP X300.

I have noticed that the maximum achievable performance is very sensitive to timing advance. e.g. while it was possible to achieve 100mbps DL at ~0 delay the max DL throughput went down to 70mbps at a TA of 200 microseconds (2-way delay). Trying to locate the problem, I could see that the code is requesting Tx bursts that are already late in time hence causing too many underruns.. 

Is there a way to improve this situation?

Would using an accelerator to offload the costly turbo decoder improve the performance given that the srsue code already exploits SIMD extensions on my 16-core Intel Xeon platform running at 3.3GHz (SSE/AVX)?

Kind Regards,
.Nemo